1. Field of the Invention
The present invention relates generally to information processors, and more particularly, to a data flow type information processor executing a data flow program including instructions to perform a numerical operation processing or logical operation processing with respect to two data.
2. Description of the Prior Art
In a conventional von Neumenn computer, various instructions are stored in advance as programs in a program memory, and addresses in the program memory are sequentially specified by a program counter so that the instructions are sequentially read out, whereby the instructions are executed.
On the other hand, a data flow type information processor is one type of a non-von Neumann computer having no concept of sequential execution of instructions by a program counter. Such a data flow type information processor employs architecture based on parallel processing of instructions. In the data flow type information processor, immediately after data which are objects of an operation are collected, an instruction can be executed, and a plurality of instructions are simultaneously driven by the data, so that programs are executed in parallel in accordance with the natural flow of the data. As a result, it is considered that the time required for the operation is significantly reduced.
FIG. 1 is a block diagram showing one example of a structure of a conventional data flow type information processor, and FIG. 2 is a diagram showing one example of a field structure of a data packet processed by the information processor.
The data packet shown in FIG. 2 comprises a destination field, an instruction field, a data 1 field, and a data 2 field. The destination field stores destination information, the instruction field stores instruction information, and the data 1 field or the data 2 field stores operand data.
The information processor shown in FIG. 1 comprises a program storing portion 1, a paired data detecting portion 2, and an operation processing portion 3. The program storing portion 1 stores a data flow program shown in FIG. 3. The program storing portion 1 reads out destination information, instruction information and copy presence/absence information in the data flow program, as shown in FIG. 3, by addressing based on the destination information in the inputted data packet, stores a destination information and the instruction information in the destination field and the instruction field in the data packet, respectively, and outputs the data packet. The paired data detecting portion 2 queues the data packet outputted from the program storing portion 1. More specifically, the paired data detecting portion 2 detects the different two data packets having the same destination information, stores operand data in one of the data packets, for example, the content of the data 1 field shown in FIG. 2 in the data 2 field in the other data packet, and outputs the other data packet. The operation processing portion 3 performs operation processing based on the instruction information with respect to the data packet outputted from the paired data detecting portion 2, stores the result of the operation processing in the data 1 field in the data packet, and outputs the data packet to the program storing portion 1.
Meanwhile, the program storing portion 1 and the paired data detecting portion 2 are coupled to each other by a data transmission path 4. The data transmission path 4 is branched into two, to be coupled to two input ports of the paired data detecting portion 2. The data packet outputted from the program storing portion 1 is selectively inputted to either one of the input ports of the paired data detecting portion 2 depending on whether the operand data is right operand data or left operand data in the operation processing. In addition, the paired data detecting portion 2 and the operation processing portion 3 are coupled to each other by a transmission path 5, and the operation processing portion 3 and the program storing portion 1 are coupled to each other by a transmission path 6.
The data packet circulates through the program storing portion 1, the paired data detecting portion 2, and the operation processing portion 3 in that order, so that operation processing based on the data flow program stored in the program storing portion 1 progresses.
Consider a case in which a copy of data is required as shown in FIG. 4, in the data flow program to be executed. More specifically, if and when the result of a given operation, for example, an output of addition instruction shown in FIG. 4 is referenced by two or more operations, instruction other than the addition instruction, for example, a multiplication instruction and a subtraction instruction shown in FIG. 4, copy processing is performed in the program storing portion 1. As shown in FIG. 3, the copy presence/absence information is stored in the program storing portion 1.
First, the content of a portion as addressed is read out from the data flow program based on the destination information of the inputted data packet. On this occasion, if the copy presence/absence information is copy absence information, a data packet is outputted in which the contents of a destination field and an instruction field are updated, so that processing is terminated. On the other hand, if the copy presence/absence information is copy presence information, the data packet is outputted in which the contents of the destination field and the instruction field are updated, and destination information, instruction information and copy presence/absence information as subsequently stored are read out. If the copy presence/absence information as subsequently read out is copy absence information, the same data as the inputted data packet is stored in the data 1 field, and a data packet is outputted in which destination information and instruction information as presently read out are stored in the destination field and the instruction field, respectively, so that processing is terminated. If the copy presence/absence information as subsequently read out is copy presence information, the same copy processing continues to be performed.
In the above described information processor, if copy processing is performed once, the ratio of flow rates of data packets in the transmission path 6 for input to the program storing portion 1 and the transmission path 4 for output from the program storing portion 1 becomes necessarily 1:2. The ratio of flow rates of data packets is a ratio of the numbers of the data packets respectively passing through the transmission paths per limit time. FIG. 5 shows the flow rate of a data packet in each transmission path, in which it is assumed that the flow rate of the data packet in the transmission path 4 is 1. The paired data detecting portion 2 outputs a single data packet corresponding to inputs of two data packets. Therefore, even if it is assumed that the transmission path 4 is operated with the best performance, only a flow rate of one half of the maximum performance is ensured in the transmission path 5 and the subsequent transmission paths.
Thus, when copy processing is performed in the program storing portion 1, the transmission paths 5 and 6 are operated with only half of maximum performance. Therefore, the operation processing portion 3 can also display only the capability of one half of the potential capability. As a result, the performance is degraded at the time of program execution in the above described information processor.
FIG. 6 is a block diagram showing another example of a structure of the conventional data flow type information processor.
The information processor shown in FIG. 6 is provided with two program storing portions 11 and 12. A data packet outputted from an operation processing portion 3 is inputted to either one of the program storing portions 11 and 12 through an allocating portion 13. The operation processing portion 3 and the allocating portion 13 are coupled to each other by a transmission path 6. The allocating portion 13 is coupled to the program storing portions 11 and 12 through transmission paths 16 and 17, respectively. In addition, the program storing portions 11 and 12 are individually coupled to a paired data detecting portion 2 through transmission paths 14 and 15, respectively. A function of each portion in the information processor shown in FIG. 6 is identical to the function of each portion in the information processor shown in FIG. 1. The allocating portion 13 allocates the data packet outputted from the operation processing portion 3 to either one of the two program storing portions 11 and 12 in order of arrival.
FIG. 7 shows the flow rate of a data packet in each transmission path, in which it is assumed that flow rates of the data packets in the transmission paths 14 and 15 are 1, respectively. In the information processor shown in FIG. 6, an input of the data packet to the program storing portions 11 and 12 is allocated by the allocating portion 13, so that the data packet is inputted to the program storing portions 11 and 12 at a rate of the maximum performance. When copy processing is performed in the program storing portions 11 and 12, the flow rate of the data packet outputted to the transmission paths 14 and 15 from the program storing portions 11 and 12 is two times the flow rate of the data packet inputted to the program storing portions 11 and 12 through the transmission paths 16 and 17. More specifically, in the transmission paths 14 and 15 for inputting the data packet to the paired data detecting portion 2, the flow rate with the maximum performance can be ensured. In addition, in the transmission path 5 for the data packet outputted from the paired data detecting portion 2, i.e., the transmission path 5 for the data packet inputted to the operation processing portion 3, the flow rate with the maximum performance can be ensured.
Thus, in the conventional information processor shown in FIG. 6, the performance of the operation processing portion 3 is enhanced to a maximum, so that a double effect of parallel processing theoretically takes place, as compared with the conventional information processor shown in FIG. 1.
However, in the information processor shown in FIG. 6, the program storing portion in the information processor shown in FIG. 1 is doubled, so that the entire storage capacity of the program storing portion in the information processor shown in FIG. 6 becomes two times that of the information processor shown in FIG. 1. Therefore, the scale of the information processor is increased.